1. Field of the Invention
This invention generally relates to a simulation methodology for analog and RF circuits. More specifically, the invention relates to an improved corner simulation methodology for such circuits.
2. Prior Art
There are a number of strategies commonly employed to simulate the performance of an integrated circuit at extremes of the processing technology. Conventional corner simulation involves performing simulations using two sets of device models: high and low (or fast and slow) corner models which represent extremes of the processing technology. Each of the two sets of devices models are developed in turn: The high/fast (low/slow) case is developed by defining an objective circuit parameter, and then skewing device model parameters to their extreme limits observed in production hardware in a way such that the objective circuit parameter is maximized (minimized). For example, defining the target as the characteristic time-constant of an analog circuit would result in device parameters for the fast case being skewed in a way to maximize active device currents, and to otherwise minimize capacitances and resistances.
The advantage of corner simulation is that it provides a quick answer to the designer about whether her circuit will function under process extremes, requiring just two additional simulation iterations for each situation analyzed.
The drawback of this method of corner file generation is that these specific combinations of model parameters do not always yield an extreme in circuit performance for all types of analog applications in complex technologies having several types of devices (i.e., the quick answer obtained with this method could be incorrect). The effects on the performance of a particular circuit caused by skewing a model parameter to one extreme limit may be canceled or reduced by the effect of some other model parameters being skewed.
This type of corner simulation is also referred to in the literature as worst case simulation.
Another strategy for simulating the performance of an integrated circuit over extremes of the processing technology is Monte Carlo simulation. Monte Carlo simulation involves simulating circuit performance using a number of randomly generated sets of device models. Information about how each model parameter varies between their extreme limits is used to set each parameter value, and to generate a full set of device models.
The advantage of Monte Carlo simulation is that it provides an accurate picture of how the circuit will function under variations in processing technology. Monte Carlo simulation has the significant drawback that many simulation iterations are required in order to get a high level of confidence that the circuit will function under extremes of process. It also has the drawback that the model parameter descriptions are difficult to extract, since theoretically, one would need to extract model parameters from a wide variety of hardware to accurately determine device model parameter variation.
Another approach, used to simplify model parameter descriptions for Monte Carlo models, is to use physically based model parameter formulation. With this technique of model generation, knowledge about how model parameters are affected by physical technology parameters that are relatively easy to characterize is exploited to develop statistically varying models. Knowledge about the tolerance with which polysilicon lines can be deposited, for example, is used to determine the variations of NFET and PFET effective channel length and polysilicon resistor width model parameters, both of which are directly proportional to the physical polysilicon line width variation. Using physically based model parameters greatly reduces the amount of hardware which needs to be characterized in order to develop accurate Monte Carlo device models.
An object of this invention is to provide a simulation approach having some of the benefits of both conventional corner simulation and Monte Carlo simulation.
Another object of the present invention is to provide an approach for simulating integrated circuits that allows a great degree of flexibility with respect to determining a specific corner file definition.
These and other objectives are attained with a method and system for creating a worst case scenario model for a given integrated circuit. The method comprises the steps of sorting skew parameters of each device into groups; and assigning a positive or negative value for each one of the groups to represent the effect of the corresponding skew parameters on the functionality of the integrated circuit.
The preferred embodiment of the invention, described below in detail, provides some of the benefits of both conventional corner simulation and Monte Carlo simulation. This approach can be implemented with only a few additional simulation iterations, which mitigates the disadvantage of Monte Carlo simulations requiring many simulation iterations. Also, this approach allows a greater degree of flexibility with respect to determining a specific corner file definition, allowing the designer to explore a greater area of model parameter space to insure that the circuit will meet performance requirements over extremes of process technology variation. This approach is easily applied when the device models are physically based, i.e. most of the device model parameters are defined in terms of physical process parameters such as dimension, resistance, capacitances. It is also assumed that the dominant statistically varying process parameters and model parameters have been defined using appropriate statistical functions based on hardware characterization data and line control targets so that full statistical models are available for a given technology.
Further benefits and advantages of the invention will become apparent from a consideration of the following detailed description, given with reference to the accompanying drawings, which specify and show preferred embodiments of the invention.